1. Field of the Invention
The present invention relates to semiconductor wafer structures and methods for fabricating same. Particularly, the present invention relates to a thinned semiconductor wafer structure including at least one structure providing reinforcement therefor.
2. Background of Related Art
Semiconductor wafer thinning techniques have been developed in response to an ever-increasing demand for smaller-sized, higher-performance semiconductor devices. For example, operation of semiconductor devices may generate relatively large amounts of heat. Accordingly, heat must be removed from a semiconductor device to avoid failure or performance degradation thereof due to excessive temperatures or a deleterious thermal environment.
One way to enhance heat transfer away from a semiconductor device and mitigate deleterious thermal effects is by thinning the semiconductor wafer on which the device is fabricated. Other reasons for thinning a semiconductor device may include dimensional packaging constraints (such as for, by way of example only, use in cell phones, personal digital assistants (PDAs) notebook computers and the like), optimization of transmission line characteristics, and reduction of the length of via holes extending transversely through the thickness of the device. Semiconductor devices may be thinned while the devices are in a wafer form or structure (i.e., prior to dicing). However, one undesirable consequence of thinning a semiconductor wafer is increased fragility thereof due to the inherently brittle nature of semiconductor materials. In turn, increased fragility of a semiconductor wafer may undesirably influence handling during the thinning operation, thereafter, or both.
Furthermore, due to the relatively high cost of semiconductor handling equipment, and correspondingly high investment therein, it will almost always be preferred to utilize, at least for a period of time, existing semiconductor handling equipment for handling thinned semiconductor wafers. Of course, such semiconductor handling equipment will have likely been designed for full thickness semiconductor wafers and, therefore, may not perform optimally or even suitably for handling thinned semiconductor wafers.
One conventional approach for addressing the fragility of a thinned semiconductor water is to mount a semiconductor wafer to a support layer or other support structure prior to thinning, wherein the support structure, alone or in combination with the semiconductor wafer structure itself, provides structural support for handling of the semiconductor wafer, as well as protection of a semiconductor wafer surface. Also, the support structure in combination with the thinned semiconductor wafer may be configured to exhibit dimensions substantially similar to a conventional, unthinned semiconductor wafer, which may facilitate handling thereof by conventional semiconductor wafer handling equipment.
For example, a conventional support structure may be affixed to a semiconductor wafer by first coating a major surface of the wafer with an adhesive material and bonding the support structure to the semiconductor wafer, thus forming a supported semiconductor wafer. In addition to providing structural support for the semiconductor wafer, the support structure may also facilitate handling of the semiconductor wafer. U.S. Pat. No. 3,475,867 to Walsh, entitled “Processing of Semiconductor Wafers,” and U.S. Pat. No. 3,492,763 to Walsh, entitled “Method and Apparatus for Mounting Semiconductor Slices,” each describes conventional methods and support structures of the type described above, respectively.
A semiconductor wafer, once supported by a conventional support structure may be thinned by either mechanically grinding or chemically etching an exposed surface thereof, typically the back side. However, the use of adhesive material may be undesirable as increasing the potential for introducing contaminants into the process area. In addition, the processing temperatures, which the supported, bonded wafer encounters, must remain below the melting temperature of the adhesive material. Other considerations may include warping or bowing of a semiconductor wafer due to difference between the coefficients of thermal expansion or stress states of the wafer and the support structure and dicing of the semiconductor wafer.
Another conventional example of methods and apparatus for supporting a semiconductor wafer during or after thinning is U.S. Pat. No. 4,853,286 to Narimatsu et al. and entitled “Wafer Processing Film,” which patent discloses providing a wafer processing film comprising a base film having a Shore D hardness of 40 or less and an adhesive layer disposed on one surface of the base film for supporting wafers such as silicon and similar wafers during grinding thereof.
Further, U.S. Pat. No. 5,476,566 to Cavasin, entitled “Method for Thinning a Semiconductor Wafer” discloses a laminated semiconductor wafer structure for providing mechanical support to a wafer during and after thinning. According to such a configuration, a semiconductor wafer is affixed to a UV-transparent support substrate with a double-sided adhesive tape, the tape having dissimilar adhesives on its two sides. Subsequent to thinning, the support substrate and the tape are removed from the wafer by exposing the laminated structure to UV radiation.
Also, U.S. Pat. No. 5,508,206 to Glenn et al., entitled “Method of Fabrication of Thin Semiconductor Device” discloses thin semiconductor devices, such as thin solar cells, and a method of fabricating same. First, material layers for forming the solar cell are formed over substantially a surface of a wafer or substrate. Then, a microblasting procedure is employed to thin the opposite surface of the semiconductor wafer or substrate, wherein fine abrasive particles are used to etch away wafer material through a mask. Thick areas remain at the perimeter of the semiconductor device or solar cell, in regions of the semiconductor device or solar cell behind the front interconnect attachment pads, and at corresponding rear interconnect attachment areas. In addition, there are thick areas in a pattern that comprise interconnected beams that support the thin wafer areas.
Accordingly, it would be advantageous to provide a semiconductor wafer structure for supporting a relatively thin semiconductor wafer and methods for forming same. Further, it would be advantageous for the methods to employ processing acts of reduced complexity and time requirements and which may be compatible with existing automated wafer handling systems.